INCH-POUND
The documentation and process conversion measures
necessary to comply with this document shall be
completed by 18 March 2005.
MIL-PRF-19500/270J
18 December 2004
SUPERSEDING
MIL-PRF-19500/270H
24 July 2003
* PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, UNITIZED, DUAL-TRANSISTOR, NPN,
SILICON, TYPES 2N2060 AND 2N2060L,
JAN, JANTX, JANTXV, AND JANS
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
*
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for two electrically isolated, matched NPN,
silicon transistors as one dual unit. Four levels of product assurance are provided for each device type as specified
in MIL-PRF-19500.
1.2 Physical dimensions. See figure 1 (similar to TO-77 or TO-99).
1.3 Maximum ratings unless otherwise specified TA = +25°C.
PT2
PT1
TA = +25°C
TC = +25°C
IC
VCBO
VCEO
VEBO
TSTG and TJ
Both
One
Both
One
sections
section
sections
section
(2)
(1)
(2)
(1)
°C
mW
W
W
mA dc
V dc
V dc
V dc
mW
540
600
1.5
2.12
500
100
60
7
-65 to +200
(1) For TA > +25°C, derate linearly 3.08 mW/°C one section, 3.48 mW/°C both sections.
(2) For TC > +25°C, derate linearly 8.6 mW/°C one section, 12.1 mW/°C both sections.
* Comments, suggestions, or questions on this document should be addressed to Defense Supply Center,
Columbus, ATTN: DSCC-VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
Semiconductor@dscc.dla.mil. Since contact information can change, you may want to verify the currency of
this address information using the ASSIST Online database at https://assist.daps.dla.mil .
AMSC N/A
FSC 5961
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