INCH-POUND
The documentation and process conversion
measures necessary to comply with this revision
MIL-PRF-19500/557L
shall be completed by 21 June 2014.
21 March 2014
SUPERSEDING
MIL-PRF-19500/557K
7 August 2012
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, FIELD EFFECT TRANSISTOR, N-CHANNEL, SILICON
TYPES 2N6796, 2N6796U, 2N6798, 2N6798U, 2N6800, 2N6800U, 2N6802, AND 2N6802U
JAN, JANTX, JANTXV, JANS, JANHC, AND JANKC
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for a N-channel, enhancement-mode,
MOSFET, power transistor intended for use in high density power switching applications. Three levels of product
assurance are provided for each encapsulated device type as specified in MIL-PRF-19500. Two levels of product
assurance are provided for each unencapsulated device type.
1.2 Physical dimensions. See figure 1, TO-205AF (formerly TO-39), figure 2 (LCC), and figures 3, 4, and 5 for
JANHC and JANKC die dimensions.
1.3 Maximum ratings. Unless otherwise specified, TA = +25°C.
VISO
RθJC
Type
PT (2)
PT
VDS
VDG
VGS
ID1 (4) (5)
ID2 (4)
IS
IDM
TJ and
70,000
(1)
TC =
TA =
TC =
TSTG
foot
(3)
TC =
(6)
altitude
+25°C
+25°C
+25°C
+100°C
°C/W
°C
W
W
V dc
V dc
V dc
A dc
A dc
A dc
A(pk)
V dc
±20
25
0.8
100
100
8.0
5.0
8.0
32
2N6796
5.0
-55 to
±20
25
0.8
200
200
5.5
3.5
5.5
22
2N6798
5.0
+150
±20
25
0.8
400
400
3.0
2.0
3.0
14
2N6800
5.0
400
25
0.8
500
500
2.5
1.5
2.5
11
2N6802
±20
5.0
500
(1)
Electrical characteristics for "U" suffix devices are identical to the corresponding non"U" suffix devices unless
otherwise specified.
Derate linearly 0.2 W/°C for TC > +25°C.
(2)
(3)
See figure 6, thermal impedance curves.
(4)
The following formula derives the maximum theoretical ID limit. ID is also limited by package and internal
wires and may be limited due to pin diameter.
TJM - TC
ID =
( RθJC
) x ( RDS ( on ) at TJM
)
See figure 7, maximum drain current graph.
(5)
(6)
IDM = 4 x ID1 as calculated in note 4.
Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since contact
information can change, you may want to verify the currency of this address information using the ASSIST
Online database at https://assist.dla.mil/.
AMSC N/A
FSC 5961
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