INCH-POUND
The documentation and process conversion
measures necessary to comply with this revision
MIL-PRF-19500/385H
shall be completed by 10 June 2009.
10 March 2009
SUPERSEDING
MIL-PRF-19500/385G
21 August 2007
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, FIELD EFFECT TRANSISTORS, N-CHANNEL, SILICON,
TYPES 2N4856 THROUGH 2N4861,
2N4856UB THROUGH 2N4861UB, JAN, JANTX, JANTXV, AND JANS
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for N-channel, depletion mode, silicon J-FET
transistors. Four levels of product assurance are provided for each device type as specified in MIL-PRF-19500.
1.2 Physical dimensions. See figure 1 (TO-18) and figure 2 (UB surface mount).
1.3 Maximum ratings. TA = +25C, unless otherwise specified. (1)
PT (2)
PT (3)
VDS, VDG
VGS
TJ and TSTG
IG
RJA
RJC
TA = +25C
TC = +25C
2N4859
2N4856
2N4859
2N4856
2N4860
2N4857
2N4860
2N4857
2N4861
2N4858
2N4861
2N4858
C/mW
C
C/W
W
W
V dc
V dc
V dc
V dc
mA dc
50
0.36
1.8
40
30
-40
-30
486
0.097
-65 to +200
0.40, all UB
325
(4)
(1)
These characteristics applicable to all package styles, unless otherwise noted.
Derate linearly 2.06 mW/C for TA > +25C.
(2)
Derate linearly 10.3 mW/C for TC > +25C.
(3)
Derate linearly 3.08 mW/C above TC +70C.
(4)
Comments, suggestions, or questions on this document should be addressed to Defense Supply Center,
Columbus, ATTN: DSCC-VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
Semiconductor@dscc.dla.mil. Since contact information can change, you may want to verify the currency of
this address information using the ASSIST Online database at https://assist.daps.dla.mil/.
AMSC N/A
FSC 5961
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