INCH-POUND
The documentation and process conversion
measures necessary to comply with this revision
MIL-PRF-19500/430C
shall be completed by 18 November 2011.
18 August 2011
SUPERSEDING
MIL-PRF-19500/430B
30 July 1999
*
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, DUAL FIELD EFFECT TRANSISTORS, N-CHANNEL, SILICON
TYPES 2N5545, 2N5546, AND 2N5547, JAN, JANTX, AND JANTXV
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
*
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for two electrically isolated, matched
N-channel, junction, silicon field-effect transistors in one package. Three levels of product assurance are
provided for each device type as specified in MIL-PRF-19500.
1.2 Physical dimensions. See figure 1 (similar to TO-71).
1.3 Maximum ratings. TA = +25°C, unless otherwise specified.
PT (1)
VDG
VGS
IG
TSTG
TA = +25°C
One section
Both sections
°C
mW
mW
V dc
V dc
mA dc
250
400
50
-50
30
-65 to +200
(1) For TA > +25°C, derate linearly 1.67 mW/°C one section, 2.67 mW/°C both sections.
* 1.4 Primary electrical characteristics. TC = +25°C, unless otherwise specified.
|yfs|
Crss
IDSS
VGS(off)
|yfs|
Ciss
Nf
Limits
VDG = 15 V dc
VDS = 15 V dc
VGS = 0
VDS = 15 V dc
VDS = 15 V dc VDS = 15 V dc
VDS = 15 V dc
ID = 200 µA dc
VGS = 0
VDS = 15 V dc ID = 0.5 nA dc
VGS = 0
VGS = 0
VGS = 0
RG = 1 MΩ
f = 1 MHz
f = 1 kHz
f = 1 MHz
f = 100 MHz
f = 10 Hz
2N5545 2N5546
mA dc
V dc
mmho
mmho
pF
pF
dB
dB
Min
0.5
-0.5
1.5
1.5
Max
8.0
-4.5
6.0
3.5
5.0
6.0
2.0
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since
contact information can change, you may want to verify the currency of this address information using the
ASSIST Online database at https://assist.daps.dla.mil/.
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