INCH-POUND
The documentation and process conversion measures
necessary to comply with this document shall be
MIL-PRF-19500/512K
completed by 27 November 2013.
27 August 2013
SUPERSEDING
MIL-PRF-19500/512J
23 April 2010
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, TRANSISTOR, PNP, SILICON, SWITCHING,
TYPES 2N4029, 2N4033, 2N4033UA, 2N4033UB, JAN, JANTX, JANTXV, JANS,
JANSM, JANSD, JANSP, JANSL, JANSR, JANSF, JANSG, JANSH, JANKC2N4033, AND JANHC2N4033
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for PNP silicon transistors designed for use in
high speed switching and driver applications. Four levels of product assurance are provided for each encapsulated
device type and two levels of product assurance for each unencapsulated specified as in MIL-PRF-19500. Provisions
for radiation hardness assurance (RHA) to eight radiation levels is provided for JANS product assurance levels. RHA
level designators "M", "D", "P", "L", "R", "F', "G", and "H" are appended to the device prefix to identify devices, which
have passed RHA requirements.
1.2 Physical dimensions. See figure 1 (TO-18), figure 2 (TO-39), figures 3 and 4 (surface mount), and figures 5
and 6 (JANKC and JANHC) herein.
* 1.3 Maximum ratings, unless otherwise specified TA = +25°C.
VCBO
VCEO
VEBO
IC
TJ and TSTG
°C
V dc
V dc
V dc
A dc
80
80
5.0
1.0
-65 to +200
Types
PT
PT
PT
RθJA
RθJC
RθJSP(IS)
RθJSP(AM)
TA = +25°C
TC = +25°C
TSP(IS) = +25°C
(2) (3)
(2) (3)
(2) (3)
(2) (3)
(1) (2)
(1) (2)
(1) (2)
°C/W
°C/W
°C/W
°C/W
W
W
W
2N4033
0.800
4
N/A
195
40
N/A
N/A
2N4029
0.500
1
N/A
325
* 150
N/A
N/A
2N4033UA
0.500
N/A
1.5
325
N/A
110
40
2N4033UB
(4) 0.500
N/A
1.5
325
N/A
90
N/A
(1)
For derating, see figures 7, 8, 9, 10, and 11.
See 3.3.
(2)
(3)
For thermal impedance curves, see figures 12, 13, 14, 15, 16, 17, and 18.
* (4)
For non-thermal conductive PCB or unknown PCB surface mount conditions in free air, substitute figures 8 and
16 for the UB package and use RθJA.
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime, ATTN:
VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil . Since contact
information can change, you may want to verify the currency of this address information using the ASSIST Online
database at https://assist.dla.mil .
AMSC N/A
FSC 5961
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