MIL-PRF-19500/566C
3. REQUIREMENTS
* 3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.
* 3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a
manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML)
* 3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as
specified in MIL-PRF-19500 and as follows:
IAS ........ Rated avalanche current, nonrepetitive
nC ........ nano Coulomb.
3.4 Interface and physical dimensions. Interface and physical dimensions shall be as specified in
MIL-PRF-19500, and on figures 1 and 2.
* 3.4.1 Lead finish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein.
Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2).
3.4.2 Internal construction. Multiple chip construction is not permitted to meet the requirements of this
specification.
3.5 Marking. Marking shall be in accordance with MIL-PRF-19500.
3.6 Electrostatic discharge protection. The devices covered by this specification require electrostatic protection.
* 3.6.1 Handling. MOS devices must be handled with certain precautions to avoid damage due to the accumulation
of static discharge. The following handling practices are recommended (see 3.6).
a.
Devices shall be handled on benches with conductive and grounded surface.
b.
Ground test equipment, tools, and personnel handling devices.
c.
Do not handle devices by the leads.
d.
Store devices in conductive foam or carriers.
e.
Avoid use of plastic, rubber, or silk in MOS areas.
f.
Maintain relative humidity above 50 percent if practical.
g.
Care shall be exercised during test and troubleshooting to apply not more than maximum rated voltage to
any lead.
Gate shall be terminated to source, R ≤ 100 kΩ,, whenever bias voltage is to be applied drain to source.
*
h.
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