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MIL-PRF-19500-566 Semiconductor Device, Transistor, Field Effect, N-Channel, Silicon, Logic Level, Types 2N6902, And 2N6904 Jan, Jantx, Jantxv And JansThis specification covers the performance requirements for logic level, N-channel, enhancement-mode, MOSFET, power transistor. Four levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500.

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MIL-PRF-19500/566C
4.3.1 Gate stress test. Apply VGS = 15 V minimum for t = 250 µs minimum.
* 4.3.2 Single pulse unclamped inductive switching.
a. Peak current, ID ................................3.0 A.
b. Peak gate voltage, VGS .....................10 V.
c. Gate to source resistor, RGS .............25 ≤ RGS ≤ 200.
*
d. Initial case temperature ....................+25°C +10, -5°C.
e. Inductance ........................................100 µH minimum.
*
f. Number of pulses to be applied .........1 pulse minimum.
g. Supply voltage VDD ...........................50 V.
* 4.3.3 Thermal impedance. The thermal impedance measurements shall be performed in accordance with method
3161 of MIL-STD-750 using the guidelines in that method for determining IM, IH, tH, tSW, (and VH where appropriate).
Measurement delay time (tMD) = 70 µs max. See table II, group E, subgroup 4 herein.
* 4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500, and as
specified herein.
* 4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with MIL-PRF-19500, table E-V
and table I herein. Electrical measurements (end-points) shall be in accordance with the inspections of table I,
subgroup 2 herein.
4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified for
subgroup testing in table E-VIA (JANS) and table E-VIB (JAN, JANTX and JANTXV) of MIL-PRF-19500, and as
follows. Electrical measurements (end-points) and delta requirements shall be in accordance with table I, subgroup 2
herein.
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