MIL-PRF-19500 Semiconductor Devices, General Specification ForThis specification establishes the general performance requirements for semiconductor devices. Product assurance is provided by effective screening, conformance inspection, and process controls to mitigate risk. Mission assurance and standardization of parts are the highest priorities. This specification establishes a heritage program of semiconductor devices the military and space community can rely on to be dependable and available. Detail requirements and characteristics are specified in the specification sheets. Revisions to this specification and specification sheets are structured to assure the interchangeability of devices of the same part type regardless of manufacturing date code or conformance inspection \(CI\) completion date. Four quality levels for encapsulated devices are provided for in this specification, differentiated by the prefixes JAN, JANTX, JANTXV, and JANS. Eight radiation hardness assurance \(RHA\) levels are provided for the JANTXV and JANS quality levels. These are designated by the letters M, D, P, L, R, F, G, and H following the quality level portion of the prefix. Two quality levels for unencapsulated devices are provided for in this specification, differentiated by the prefixes JANHC and JANKC.

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MIL-PRF-19500P

APPENDIX H

H.3.2 Package. All packaged devices supplied under this specification shall be hermetically sealed unless

otherwise specified in the applicable specification sheet. No organic or polymeric material shall be used as a

package or package seal unless specifically allowed in the applicable specification sheet

H.3.3 Fungus-resistant material. External parts of the semiconductor device shall be inherently non-nutrient to

fungus.

H.3.4 Metals. Internal surfaces shall be capable of resisting progressive degradation within a hermetically sealed

package. External metal surfaces shall be corrosion resistant or shall be plated or treated to resist corrosion. Device

package material shall be free of burrs and other potential particle contamination.

H.3.5 Screw threads. Standard screw threads listed in FED-STD-H28 shall be required for all semiconductor

devices where screw threads are a mechanical requirement of the device.

H.3.6 Internal conductors. Internal conductors which are in thermal contact with a substrate along their entire

lengths (such as metallization strips, contact areas, and bonding interfaces) shall be designed so that no properly

fabricated conductor shall experience, at device maximum rated current, a current density in excess of the values

shown below for the applicable conductor material including allowances for worst case conductor composition,

cross-sectional area, normal production tolerances on critical interface dimensions, and actual thickness at critical

areas, such as steps in the elevation or contact windows:

Maximum allowable continuous current density

Conductor material

(RMS for pulse applications)

Aluminum (99.99 percent pure or

2 x 105 amps/cm2

doped) without glassivation

Aluminum (99.99 percent pure or

doped) with glassivation

5 x 105 amps/cm2

Gold

6 x 105 amps/cm2

All other (unless otherwise specified)

2 x 105 amps/cm2

H.3.6.1 Wire bonds. Thermocompression wedge bonds shall not be utilized when aluminum wire is used. Unless

otherwise specified, bi-metallic (e.g. gold-aluminum) bonds at the die shall not be permitted, see D.3.9.5.b for bake

requirements of parts utilizing a bi-metallic bonds at the die.

H.3.6.2 Die mounting. Pure glass shall not be used for device die mounting.

H.3.7 Silicon transistor metallization protective coating. All silicon transistors with maximum rating of less than 4

watts at TC of +25�C, shall have an inorganic transparent protective overlay material on the active metallization

(excluding the bonding pads). For JANS (overlay structures or expanded metallization) devices, the minimum

deposited glassivation thickness shall be 3,500 � of Si02 or 1,000 � of Si3N4. The glassivation shall cover all

electrical conductors on the chip except the bonding pads. For JANS (overlay structures or expanded metallization)

devices, a minimum of 2 mils (0.050 mm) distance shall be maintained between all uncoated conducting paths,

except where the functional performance parameters of the device require closer spacing.

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