MIL-PRF-19500-144 Semiconductor Device, Diode, Silicon, Switching, Types 1N4454-1, 1N4454Ur-1, 1N4454Ub, 1N4454Ubca, 1N4454Ubcc, 1N4454Ubd, 1N3064, 1N4532, Jan, Jantx, Jantxv, Janhc, And JankcThis specification covers the performance requirements for silicon, diffused, switching diodes. Three levels of product assurance are provided for each device type as specified in MIL-PRF-19500.

Pages 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - 15 - 16

MIL-PRF-19500/144R

4. VERIFICATION

4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:

a. Qualification inspection (see 4.2).

b. Screening (see 4.3).

c. Conformance inspection (see 4.4).

4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as specified

herein.

* 4.2.1 JANHC and JANKC qualification. JANHC and JANKC qualification inspection shall be in accordance with

4.2.2 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In

case qualification was awarded to a prior revision of the specification sheet that did not require the performance of

table II tests, the tests specified in table II herein that were not performed in the prior revision shall be performed on

the first inspection lot of this revision to maintain qualification.

4.3 Screening (JANTX and JANTXV levels). Screening shall be in accordance with table E-IV of

MIL-PRF-19500 and as specified herein. Specified electrical measurements shall be made in accordance with table I

herein. Devices that exceed the limits of table I herein shall not be acceptable.

Screening

(see table E-IV of

JANTXV and JANTX level

(1) 3c

Thermal impedance (see 4.3.3)

Not required

Method 1038 of MIL-STD-750, condition A

(2) 11

IR1 and VF1

Subgroup 2 of table I herein; ĆIR1 = 100 percent of initial value or

(3) (4) 13

25 nA dc, whichever is greater; ĆVF1 = 25 mV dc.

14a

Not applicable

(5) 14b

Required

(1) Thermal impedance shall be performed any time after sealing provided temperature cycling is performed in

accordance with MIL-PRF-19500, screen 3 prior to this thermal test.

(2) Test within 24 hours after removal from test.

(3) When thermal impedance is performed prior to screen 13, it is not required to be repeated in screen 13.

(4) PDA ≤ 5 percent.

(5) For clear glass diodes, the hermetic seal (gross leak) test may be performed any time after temperature cycling,

fine and gross leak required for UB package.

* 4.3.1 Screening (JANHC and JANKC). Screening of JANHC and JANKC die shall be in accordance with

MIL-PRF-19500 "Discrete Semiconductor Die/Chip Lot Acceptance". Burn-in duration for the JANKC level follows

JANS requirements; the JANHC follows JANTX requirements.