MIL-PRF-19500-376 Semiconductor Device, Transistor, Npn, Silicon, Low-Power, Types 2N2484, 2N2484Ua, 2N2484Ub, 2N2484Ubc, 2N2484Ubn, 2N2484Ubcn Jan, Jantx, Jantxv, Jans, Jansm, Jansd, Jansp, Jansl, Jansr, Jansf, Jansg, Jansh Janhca, Janhcb, Jankca, Jankcb, Jankcm, Jankcd, Jankcp, Jankcl, Jankcr, Jankcf, Jankcg, And JankchThis specification covers the performance requirements for NPN, silicon, low-power transistors. Four levels of product assurance are provided for each device type as specified in MIL-PRF-19500. Two levels of product assurance are provided for die. RHA level designators "M", "D", "P", "L", "R", "F", "G" and "H" are appended to the device prefix to identify devices, which have passed RHA requirements.

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MIL-PRF-19500/376K

4.4.2.2 Group B inspection, (JAN, JANTX, and JANTXV). Separate samples may be used for each step. In the

event of a lot failure, the resubmission requirements of MIL-PRF-19500 shall apply. In addition, all catastrophic

failures during CI shall be analyzed to the extent possible to identify root cause and corrective action. Whenever a

failure is identified as wafer lot or wafer processing related, the entire wafer lot and related devices assembled from

the wafer lot shall be rejected unless an appropriate determined corrective action to eliminate the failures mode has

been implemented and the devices from the wafer lot are screened to eliminate the failure mode.

Step

Method

Condition

Steady-state life: 1,000 hours minimum, VCB = 10 V dc, power shall be applied to achieve

1026

TJ = +150C minimum using a minimum of PD = 75 percent of maximum rated PT as defined

in 1.3. n = 45 devices, c = 0. The sample size may be increased and the test time

decreased as long as the devices are stressed for a total of 45,000 device hours minimum,

and the actual time of test is at least 340 hours.

Blocking life, TA = +150C, VCB = 80 percent of rated voltage, 48 hours minimum.

1048

n = 45 devices, c = 0.

High-temperature life (non-operating), t = 340 hours, TA = +200C. n = 22, c = 0.

1032

4.4.2.3 Group B sample selection. Samples selected from group B inspection shall meet all of the following

requirements:

a. For JAN, JANTX, and JANTXV, samples shall be selected randomly from a minimum of three wafers (or from

each wafer in the lot) from each wafer lot. For JANS, samples shall be selected from each inspection lot. See

MIL-PRF-19500.

b. Shall be chosen from an inspection lot that has been submitted to and passed table I, subgroup 2,

conformance inspection. When the final lead finish is solder or any plating prone to oxidation at high

temperature, the samples for life test (subgroups B4 and B5 for JANS, and group B for JAN, JANTX, and

JANTXV) may be pulled prior to the application of final lead finish.

4.4.3 Group C inspection. Group C inspection shall be conducted in accordance with the test and conditions

specified for subgroup testing in table E-VII of MIL-PRF-19500, and in 4.4.3.1 (JANS) and 4.4.3.2 (JAN, JANTX, and

JANTXV) herein for group C testing. Electrical measurements (end-points) shall be in accordance with table I,

subgroup 2 herein. Delta requirements shall be in accordance with table IV herein.

4.4.3.1 Group C inspection (JANS), table E-VII of MIL-PRF-19500.

Subgroup

Method

Condition

2036

Test condition E; (not applicable for UA, UB, UBC, UBN, and UBCN devices).

3131

RJA only, as applicable (see 1.3) and in accordance with thermal impedance

curves.

1,000 hours at VCB = 10 V dc; power shall be applied to achieve TJ = +150C minimum and

1026

a minimum of PD = 75 percent of maximum rated PT as defined in 1.3 n = 45, c = 0. The

sample size may be increased and the test time decreased as long as the devices are

stressed for a total of 45,000 device hours minimum, and the actual time of test is at least

340 hours.