MIL-PRF-19500-542 Semiconductor Device, Transistor, Field Effect, N-Channel, Silicon, Types 2N6756, 2N6758, 2N6760, 2N6762, Jan, Jantx, Jantxv, Jans, Janhc, And JankcThis specification covers the performance requirements for N-channel, enhancement-mode, MOSFET, power transistors. Four levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500 and two levels of product assurance are provided for each unencapsulated device type.

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MIL-PRF-19500/542J

2.2 Government documents.

2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a

part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are

those cited in the solicitation or contract.

DEPARTMENT OF DEFENSE SPECIFICATIONS

Semiconductor Devices, General Specification for.

DEPARTMENT OF DEFENSE STANDARDS

Test Methods for Semiconductor Devices.

(Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or

https://assist.daps.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D,

Philadelphia, PA 19111-5094.)

2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the

text of this document and the references cited herein, the text of this document takes precedence. Nothing in this

document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.

3. REQUIREMENTS

3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.

3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a

manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML)

before contract award (see 4.2 and 6.3).

3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as

nC ............................ nano coulomb.

IAS ............................ Rated avalanche current, non-repetitive.

3.4 Interface and physical dimensions. Interface and physical dimensions shall be as specified in

MIL-PRF-19500, and on figure 1 (TO-204AA; formerly TO-3), figures 2, and 3 for JANHC and JANKC die dimensions.

3.4.1 Lead finish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein.

Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2).

3.4.2 Internal construction. Multiple chip construction is not permitted to meet the requirements of this

specification.

3.5 Marking. Marking shall be in accordance with MIL-PRF-19500.