MIL-PRF-19500/349J
4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500, and as
specified herein. If alternate screening is being performed in accordance with MIL-PRF-19500, a sample of screened
devices shall be submitted to and pass the requirements of group A1 and A2 inspection only (table E-VIb, group B,
subgroup 1 is not required to be performed again if group B has already been satisfied in accordance with 4.4.2).
4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with MIL-PRF-19500, and
table I herein. Electrical measurements (end-points) shall be in accordance with the applicable inspections of table I,
subgroup 2 herein.
* 4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the tests and conditions
specified for subgroup testing in table E-VIa (JANS) of MIL-PRF-19500 and 4.4.2.1. Electrical measurements (end-
points) shall be in accordance with table I, subgroup 2 herein. See 4.4.2.2 for JAN, JANTX, and JANTXV group B
testing. Electrical measurements (end-points) for JAN, JANTX, and JANTXV shall be after each step in 4.4.2.2 and
shall be in accordance with table I, subgroup 2 herein.
*
4.4.2.1 Group B inspection, table E-VIa (JANS) of MIL-PRF-19500.
Subgroup
Method
Condition
* B3
2037
Test condition D.
VCB = 10 V dc.
B4
1037
B5
1027
occurs, resubmission shall be at the test conditions of the original sample.)
Option 1: 96 hours minimum sample size in accordance with table E-VIa of
MIL-PRF-19500, adjust TA or PD to achieve TJ = +275°C minimum.
Option 2: 216 hours minimum, sample size = 45, c = 0; adjusted TA or PD to achieve a
TJ = +225°C minimum.
4.4.2.2 Group B inspection, (JAN, JANTX, and JANTXV). Separate samples may be used for each step. In the
event of a lot failure, the resubmission requirements of MIL-PRF-19500 shall apply. In addition, all catastrophic
failures during CI shall be analyzed to the extent possible to identify root cause and corrective action. Whenever a
failure is identified as wafer lot or wafer processing related, the entire wafer lot and related devices assembled from
the wafer lot shall be rejected unless an appropriate determined corrective action to eliminate the failures mode has
been implemented and the devices from the wafer lot are screened to eliminate the failure mode.
Method
Condition
Step
1
1026
Steady-state life: 1,000 hours, VCB = 10 V dc, power shall be applied to achieve TJ =
+150°C minimum using a minimum power dissipation PD = 75 percent of PT maximum
rated as defined in 1.3 herein. n= 45 devices, c = 0. The sample size may be increased
and the test time decreased so long as the devices are stressed for a total of 45,000
device hours minimum, and the actual time of test is at least 340 hours.
Blocking life, TA = +150°C, VCB = 80 percent of rated voltage, 48 hours minimum.
2
1048
n = 45 devices, c = 0.
High-temperature life (non-operating), t = 340 hours, TA = +200°C. n = 22, c = 0.
3
1032
8
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