MIL-PRF-19500-368 Semiconductor Device, Transistor, Npn, Silicon, Low-Power Types: 2N3439, 2N3439L, 2N3439Ua, 2N3439U4, 2N3440, 2N3440L, 2N3440Ua, And 2N3440U4, Jan, Jantx, Jantxv, Jans, Janhcb, Jankcb, Janhcc, Jankcc Jansm, Jansd, Jansp, Jansl, Jansr, Jansf, Jansg, Jansh, Jankcbm, Jankcbd, Jankcbp, Jankcbl, Jankcbr, Jankcbf, Jankcbg, And JankcbhThis specification covers the performance requirements for NPN, silicon, low-power, high voltage transistors. Four levels of product assurance are provided for each encapsulated device types as specified in MIL-PRF-19500, and two levels of product assurance for each unencapsulated device type die. RHA level designators "M", "D", "P", "L", "R", "F", "G", and "H" are appended to the device prefix to identify devices, which have passed RHA requirements.

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MIL-PRF-19500/368M

3. REQUIREMENTS

3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.

3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a

manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML)

before contract award (see 4.2 and 6.3).

3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as

specified in MIL-PRF-19500.

RθJA

Thermal resistance junction to ambient.

Thermal resistance junction to case.

RθJC

Thermal resistance junction to solder pads.

RθJSP

Surface mount case outlines (see figure 3).

TRB

Technical review board.

Temperature of solder pads.

TSP

3.4 Interface and physical dimensions. The interface and physical dimensions shall be as specified in

MIL-PRF-19500 and on figure 1 (similar to TO- 5 and TO-39), figure 2 (JANHCB and JANKCB (B versions)), figure 3

(2N3439UA and 2N3440UA surface mount, figure 4 (2N3439U4 and 2N3440U4)), and figure 5 (JANHCC and

JANKCC (C versions)).

3.4.1 Lead finish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein.

Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2).

3.5 Radiation hardness assurance (RHA). Radiation hardness assurance requirements, PIN designators, and test

levels shall be as defined in MIL-PRF-19500.

3.6 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance

characteristics are as specified in 1.3, 1.4, and table I herein.

3.7 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table I herein.

3.8 Marking. Marking shall be in accordance with MIL-PRF-19500. At the option of the manufacturer, marking

may be omitted from the body, but shall be retained on the initial container. The radiation hardened designator M, D,

P, L, R, F, G, or H shall immediately precede (or replace) the device "2N" identifier (depending upon degree of

abbreviation required).

3.9 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and

shall be free from other defects that will affect life, serviceability, or appearance.

4. VERIFICATION

4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:

a. Qualification inspection (see 4.2).

b. Screening (see 4.3).

c. Conformance inspection (see 4.4 and tables I, II, and III).

4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and table III

herein.