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MIL-PRF-19500-435 Semiconductor Device, Diode, Silicon, Low-Noise Voltage Regulator, Types 1N4099-1 Through 1N4135-1, 1N4614-1 Through 1N4627-1, 1N4099Ur-1 Through 1N4135Ur-1, 1N4614Ur-1 Through 1N4627Ur-1, \(Ub, Ub2, Ub2R, Ubca, Ubd, And Ubcc\), C And D Tolerance Suffix Devices, Jan, Jantx, Jantxv, Jans, Janhc, And JankcThis specification covers the performance requirements for 500 milliwatt, silicon, low-noise, voltage regulator diodes with voltage tolerances of 5 percent, 2 percent, and 1 percent. Four levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500, and two levels of product assurance for each unencapsulated device type \(die\). For JANHC and JANKC quality levels see 6.5.

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MIL-PRF-19500/435M
4.3 Screening (JAN, JANTX, JANTXV, and JANS levels only). Screening shall be in accordance with appendix E,
table E-IV of MIL-PRF-19500, and as specified herein. The following measurements shall be made in accordance
with table I herein. Devices that exceed the limits of table I herein shall not be acceptable.
Screen
Measurement
table E-IV of
JANS level
JANTXV and JANTX level
1a
Required
Not required
1b
Required
Required (JANTXV only)
2
Not required
Not required
3a
Required
Required
3b
Not applicable
Not applicable
(1) 3c
Required (see 4.3.2)
Required (see 4.3.2)
4, 5, and 6
Not applicable
Not applicable
8
Required
Not required
Required on Nom VZ > 10 V, IR1 and VZ
9
Not applicable
Required on Nom VZ > 10 V
10
Not applicable
11
Required
Required
ĆIR1 ≤ 100 percent of initial reading or 10
IR1 and VZ
nA whichever is greater. ĆVZ ≤ 2 percent of
initial reading.
12
Required, see 4.3.3
Required,
t = 240 hours.
See 4.3.3, t = 48 hours
Subgroup 2 of table I herein; ĆIR1 ≤ 100
(2) 13
Required
Subgroup 2 of table I herein; ĆIR1 ≤ 100
percent of initial reading or 10 nA
whichever is greater; ĆVZ ≤ 2 percent of
percent of initial reading or 10 nA whichever
is greater; ĆVZ ≤ 2 percent of initial reading.
initial reading.
15
Required
Not required
16
Required
Not required
(1) Shall be performed anytime after temperature cycling, screen 3a; TX and TXV levels do not need to be repeated
*
in screening requirements.
(2) PDA = 5 percent for screen 13, applies to ĆIR1, ĆVZ, IR1 and VZ (JANS only).
4.3.1 Screening (JANHC and JANKC). Screening of JANHC and JANKC die shall be in accordance with appendix
4.3.1.1 JAN product. JAN product will have temperature cycling and thermal impedance testing performed in
accordance with MIL-PRF-19500, JANTX level screening requirements.
4.3.2 Thermal impedance. The thermal impedance measurements shall be performed in accordance with method
3101 or 4081 as applicable of MIL-STD-750 using the guidelines in that method for determining IM, IH, tH, tMD (and
VC where appropriate). See table II, subgroup 4 herein. Measurement delay time (tMD) = 70 us max.
4.3.3 Free air power burn-in conditions. Power burn-in conditions are as follows (see 4.5.4 herein): IZ(min) =
IZ(PCB). TA = 75�C maximum. Test conditions shall be in accordance with method 1038 of MIL-STD-750, condition
B. Adjust IZ or TA to achieve the required TJ. TJ = 125�C minimum. With approval of the qualifying activity and
preparing activity, alternate burn-in criteria (hours, bias conditions, TJ, mounting conditions) may be used for JANTX
and JANTXV quality levels. A justification demonstrating equivalence is required. In addition, the manufacturing
site's burn-in data and performance history will be essential criteria for burn-in modification approval.
10



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