INCH-POUND
The documentation and process conversion
measures necessary to comply with this revision
MIL-PRF-19500/476F
shall be completed by 13 March 2014.
13 December 2013
SUPERSEDING
MIL-PRF-19500/476E
23 January 2012
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, FIELD EFFECT TRANSISTORS, P-CHANNEL, SILICON,
TYPES 2N5114 THROUGH 2N5116 AND 2N5114UB THROUGH 2N5116UB,
JAN, JANTX, AND JANTXV
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for P-channel, junction, silicon field-effect
transistors. Three levels of product assurance are provided for each device type as specified in MIL-PRF-19500.
1.3 Maximum ratings. TA = +25°C, unless otherwise specified.
PT (1)
VGS (2)
VDS
VDG (2)
IG
TSTG
TA = +25°C
°C
W
V dc
V dc
V dc
mA dc
0.500
30
30
30
50
-65 to +200
Derate linearly 3.0 mW/°C for TA = +25°C.
(1)
(2)
Symmetrical geometry allows operation of those units with source/drain leads interchanged.
1.4 Primary electrical characteristics.
IDSS (1)
VDS(on)
Limits VDS = -18 V dc VDS = -15 V dc VDS = -15 V dc ID = -15 mA dc ID = -7 mA dc
ID = -3 mA dc
VGS = 0
VGS = 0
VGS = 0
VGS = 0
VGS = 0
VGS = 0
2N5114
2N5115
2N5116
2N5114
2N5115
2N5116
2N5114UB
2N5115UB
2N5116UB
2N5114UB
2N5115UB
2N5116UB
mA dc
mA dc
mA dc
V dc
V dc
V dc
-30
-15
-5.0
Min
Max
-90
-60
-25
-1.3
-0.8
-0.6
See notes on next page.
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ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since contact
information can change, you may want to verify the currency of this address information using the ASSIST
Online database at https://assist.dla.mil/.
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