The documentation and process conversion measures
INCH-POUND
necessary to comply with this document shall be
completed by 13 February 2014.
MIL-PRF-19500/538G
13 December 2013
SUPERSEDING
MIL-PRF-19500/538F
10 February 2011
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON, POWER,
TYPES 2N6676, 2N6678, 2N6676T1, 2N6678T1, 2N6676T3, 2N6678T3, 2N6691, AND 2N6693,
JAN, JANTX, JANTXV, JANS, JANSM, JANSD, JANSP, JANSL, JANSR, JANSF, JANSG, JANSH, JANHCA,
JANKCA, JANKCAM, JANKCAD, JANKCAP, JANKCAL, JANKCAR, JANKCAF, JANKCAG, AND JANKCAH
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for NPN silicon, power transistors. Four levels
of product assurance are provided for each device type as specified in MIL-PRF-19500. Two levels of product
assurance are provided for each unencapsulated device type. Provisions for radiation hardness assurance (RHA) to
eight radiation levels is provided for JANS and JANKC product assurance levels. RHA level designators "M", "D", "P",
"L", "R", "F", "G", and "H" are appended to the device prefix to identify devices, which have passed RHA requirements.
1.2 Physical dimensions. See figure 1 (TO-3) - 2N6676, 2N6678; figure 2 (TO-61) - 2N6691, 2N6693, figure 3
(TO-254AA) - 2N6676T1, 2N6678T1, figure 4 (TO-257AA) - 2N6676T3, 2N6678T3, and figure 5 (JANHC and
JANKC).
1.3 Maximum ratings.
PT (1)
VCBO and
TJ and TSTG
Types
PT
VCEO
RθJC
VEBO
IB
IC
TC = +25°C
TA = +25°C
VCEX
(2)
°C/W
°C
W
W
V dc
V dc
V dc
A dc
A dc
2N6676, 2N6676T1
6
175
1.0
450
300
-65 to +200
8.0
5
15
2N6678, 2N6678T1
6
175
1.0
650
400
-65 to +200
8.0
5
15
2N6676T3
4
(3) 125
1.3
450
300
-65 to +200
8.0
5
15
2N6678T3
4
(3) 125
1.3
650
400
-65 to +200
8.0
5
15
2N6691
6
175
1.0
450
300
-65 to +200
8.0
5
15
2N6693
6
175
1.0
650
400
-65 to +200
8.0
5
15
(1) See figures 6 and 7 for temperature-power derating curves.
(2) See figures 8 through 11, thermal impedance curves.
(3) For TO-257 devices with typical mounting and small footprint, conservatively rated at 125 W and 1.3°C/W only.
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since
contact information can change, you may want to verify the currency of this address information using the
ASSIST Online database at https://assist.dla.mil .
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