MIL-PRF-19500-538 Semiconductor Device, Transistor, Npn, Silicon, Power, Types 2N6676, 2N6678, 2N6676T1, 2N6678T1, 2N6676T3, 2N6678T3, 2N6691, And 2N6693, Jan, Jantx, Jantxv, Jans, Jansm, Jansd, Jansp, Jansl, Jansr, Jansf, Jansg, Jansh, Janhca, Jankca, Jankcam, Jankcad, Jankcap, Jankcal, Jankcar, Jankcaf, Jankcag, And JankcahThis specification covers the performance requirements for NPN silicon, power transistors. Four levels of product assurance are provided for each device type as specified in MIL-PRF-19500. Two levels of product assurance are provided for each unencapsulated device type. Provisions for radiation hardness assurance \(RHA\) to eight radiation levels is provided for JANS and JANKC product assurance levels. RHA level designators "M", "D", "P", "L", "R", "F", "G", and "H" are appended to the device prefix to identify devices, which have passed RHA requirements.

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MIL-PRF-19500/538G

4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500, and as

specified herein.

4.2.1 JANHC and JANKC qualification. JANHC and JANKC qualification inspection shall be in accordance with

MIL-PRF-19500.

4.2.2 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In

case qualification was awarded to a prior revision of the specification sheet that did not request the performance of

table III tests, the tests specified in table III herein that were not performed in the prior revision shall be performed on

the first inspection lot of this revision to maintain qualification.

* 4.3 Screening. Screening shall be in accordance with table E-IV of MIL-PRF-19500, and as specified herein.

The following measurements shall be made in accordance with table I herein. Devices that exceed the limits of table

I herein shall not be acceptable.

Measurements

Screen (see table E-IV

of MIL-PRF-19500)

JANS

JANTX and JANTXV levels

Thermal impedance, method 3131 of

(1) 3c

MIL-STD-750 (see 4.3.1)

ICEX1 and hFE2

ĆICEX1 = 100 percent of initial value or

500 nA dc, whichever is greater;

ĆhFE2 = �15 percent of initial value.

ĆhFE2 = �25 percent of initial value.

See 4.3.2

Subgroup 2 of table I herein;

Subgroup 2 and 3 of table I herein;

ĆICEX1 = 100 percent of initial value or

500 nA dc, whichever is greater;

ĆhFE2 = �25 percent of initial value.

For TO-254AA packages: Method 1081

of MIL-STD-750 (see 4.3.4), Endpoints:

Subgroup 2 of table I herein.

* (1)

Shall be performed anytime after temperature cycling, screen 3a; JANTX and JANTXV levels do not need to

be repeated in screening requirements.

* 4.3.1 Thermal impedance. The thermal impedance measurements shall be performed in accordance with

method 3131 of MIL-STD-750 using the guidelines in that method for determining IM, IH, tH, tSW, (and VH where

appropriate). Measurement delay time (tMD) = 70 �s max. The thermal impedance limit shall comply with the thermal

impedance graph on figures 8, 9, 10, and 11 (less than or equal to the curve value at the same tH time) and shall be

less than the process determined statistical maximum limit as outlined in method 3131 of MIL-STD-750. See table III,

subgroup 4 herein.

4.3.2 Power burn-in conditions. Power burn-in conditions are: TJ = + 175 �C minimum, VCB ≥ 100 V dc;

TA = +30�C maximum.

4.3.3 Screening (JANHC and JANKC). Screening of JANHC and JANKC die shall be in accordance with

MIL-PRF-19500, "Discrete Semiconductor Die/Chip Lot Acceptance". Burn-in duration for the JANKC level follows

JANS requirements; the JANHC follows JANTX requirements.