INCH-POUND
The documentation and process conversion
measures necessary to comply with this revision
MIL-PRF-19500/547D
shall be completed by 29 November 2011.
29 August 2011
SUPERSEDING
MIL-PRF-19500/547C
24 June 2009
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, FIELD EFFECT TRANSISTOR, N-CHANNEL,
SILICON, TYPES 2N6660 AND 2N6661,
JAN, JANTX, JANTXV, AND JANS
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for a N-channel, enhancement-mode, low-
threshold logic level, high frequency, high switching speed MOSFET, power transistor. Four levels of product
assurance are provided for each encapsulated device type as specified in MIL-PRF-19500.
1.2 Physical dimensions. See figure 1 (TO-205AD).
* 1.3 Maximum ratings. Unless otherwise specified, TA = +25°C.
RθJC
Type
PT (1)
PT
VDS
VDGR
VGS
ID1 (3)
ID2 (3)
IS
IDM
TJ and
TC = +25°C TC = +100°C
TC =
TA =
TSTG
+25°C
+25°C
°C/W
°C
W
mW
V dc
V dc
V dc
A dc
A dc
A dc
A (pk)
-65 to +150
± 20
2N6660
6.25
725
60
60
0.99
0.62
-0.99
3
20
± 20
2N6661
725
90
90
0.86
0.54
-0.86
3
20
6.25
(1) Derate linearly by 0.05 W/°C for TC > +25°C.
(2) RGS ≤ 1 M ohm.
*
(3) The following formula derives the maximum theoretical ID limit. ID is limited by package and internal
construction.
TJM - TC
ID =
( RθJC
) x ( R DS ( on ) at TJM
)
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since contact
information can change, you may want to verify the currency of this address information using the ASSIST
Online database at https://assist.daps.dla.mil/.
AMSC N/A
FSC 5961
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