MIL-PRF-19500-559 Semiconductor Device, Unitized, Npn, Silicon, Switching, Four Transistor Array, Types 2N6989, 2N6989U, And 2N6990, Jan, Jantx, Jantxv, Jans, Jansm, Jansd, Jansp, Jansl, Jansr, Jansf, Jansg, And JanshThis specification covers the performance requirements for NPN, silicon, switching transistors in a four independent chip array. Four levels of product assurance are provided for each device type as specified in MIL-PRF-19500. Provisions for radiation hardness assurance \(RHA\) to eight radiation levels is provided for JANS product assurance levels. RHA level designators "M", "D", "P", "L", "R", "F", "G", and "H" are appended to the device prefix to identify devices, which have passed RHA requirements.

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MIL-PRF-19500/559K

3. REQUIREMENTS

3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.

3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a

manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturers list

before contract award (see 4.2 and 6.3).

3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as

specified in MIL-PRF-19500 and as follows.

DPA ......................... Destructive physical analysis.

ESD ......................... Electrostatic discharge.

PCB

Printed circuit board.

Thermal resistance junction to ambient.

RθJA

Thermal resistance junction to ambient (adhesive mount to PCB).

RθJA(AM)

RθJC .......................... Thermal resistance junction to case.

3.4 Interface and physical dimensions. Interface and physical dimensions shall be as specified in

MIL-PRF-19500, and on figures 1, 2, 3, 4, and 5.

3.4.1 Lead finish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein.

Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2).

3.4.2 Schematic and terminal connections. The schematic and terminal connections shall be as shown on

figure 3 (for flat package and dual-in-line) and on figure 5 (for leadless chip carrier).

3.5 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance

characteristics are as specified in 1.3, 1.4, and table I herein.

3.6 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table I.

* 3.7 Marking. Marking shall be in accordance with MIL-PRF-19500. The radiation hardened designator M, D, P,

L, R, F, G, or H shall immediately precede (or replace) the device "2N" identifier (depending upon degree of

abbreviation required).

3.8 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and

shall be free from other defects that will affect life, serviceability, or appearance.

4. VERIFICATION

4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:

a. Qualification inspection (see 4.2).

b. Screening (see 4.3).

c. Conformance inspection (see 4.4 and table I and II).

4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as

specified herein.