INCH-POUND
The documentation and process conversion measures
necessary to comply with this document shall be
MIL-PRF-19500/253L
completed by 7 July 2011.
7 April 2011
SUPERSEDING
MIL-PRF-19500/253K
3 July 2008
PERFORMANCE SPECIFICATION SHEET
* SEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON, LOW-POWER,
TYPES 2N930 AND 2N930UB, JAN, JANTX, JANTXV, JANS, JANHC, JANKC, JANSM, JANSD, JANSP, JANSL,
JANSR, JANSF, JANSG, JANSH, JANHC, JANHCM, JANHCD, JANHCP, JANHCL, JANHCR, JANHCF, JANHCG,
JANHCH, JANKC, JANKCM, JANKCD, JANKCP, JANKCL, JANKCR, JANKCF, JANKCG, AND JANKCH
MIL-PRF-19500/253 is inactive for new design after 3 June 2004.
For new design use MIL-PRF-19500/376.
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1 SCOPE
* 1.1 Scope. This specification covers the performance requirements for an NPN, silicon, low-power transistors.
Four levels of product assurance are provided for each device type as specified in MIL-PRF-19500, and two levels of
product assurance are provided for each unencapsulated device. Radiation hardness assurance (RHA) level
designators "M", "D", "P", "L" "R", "F', "G", and "H" are appended to the device prefix to identify devices which have
passed RHA requirements.
1.2 Physical dimensions. See figure 1 (TO-18), figure 2 (UB, surface mount), and figures 3, 4, and 5 (die).
1.3 Maximum ratings. Unless otherwise specified, TC = +25°C.
VCBO
IC
TJ and TSTG
VCEO
VEBO
V dc
V dc
V dc
mA dc
°C
60
45
6
30
-65 to +200
Types
PT (1)
PT (1)
PT (1)
RθJC
RθJSP(IS)
RθJA
(2)
(2)
(2)
TA = +25°C
TC = +25°C
TSP = +25°C
°C/W
°C/W
°C/W
mW
mW
mW
2N930
360
360
N/A
485
150
N/A
2N930UB
N/A
N/A
360
325 (3)
N/A
95
(1) For derating, see figures 6, 7, 8, and 9.
(2) For thermal impedance curves see figures 10, 11, and 12.
*
(3) Mounted on FR-4 base material PCB (1 ounce copper) with contacts 20 mils larger than package pads.
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since contact
information can change, you may want to verify the currency of this address information using the ASSIST Online
database at https://assist.daps.dla.mil .
AMSC N/A
FSC 5961
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