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MIL-PRF-19500-562 Semiconductor Device, Field Effect Transistor, P-Channel, Silicon, Types 2N6804 And 2N6806 Jan, Jantx, Jantxv, Jans, Janhc, And JankcThis specification covers the performance requirements for a P-channel, enhancement-mode, MOSFET, power transistor intended for use in high density power switching applications. Four levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500 and two levels of product assurance are provided for each unencapsulated device type.

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MIL-PRF-19500/562E

* TABLE I. Group A inspection.

Inspection 1/

MIL-STD-750

Symbol

Limits

Unit

Method

Conditions

Min

Max

Subgroup 1

Visual and mechanical

2071

inspection

Subgroup 2

�C/W

Thermal impedance 2/

3161

See 4.3.3

ZθJC

Bias condition C, VGS = 0 V;

Breakdown voltage,

3407

V dc

V(BR)DSS

ID = -1.0 mA dc

drain to source

-100

2N6804

2N6806

-200

VDS ≥ VGS; ID = -0.25 mA dc

-2.0

-4.0

V dc

Gate to source voltage

VGS(th)1

3403

(threshold)

�100

Gate reverse current

3411

Bias condition C; VDS = 0 V;

IGSS1

nA dc

VGS = +20 and -20 V dc

�A dc

Drain current

3413

VGS = 0; bias condition C;

IDSS1

-25

VDS = 0 V; VDS = 80 percent of

rated VDS

Ω

Static drain to source

3421

VGS = -10 V dc; condition A,

rDS(on)1

on-state resistance

pulsed (see 4.5.1)

ID = -7 A dc

2N6804

0.30

2N6806

ID = -4 A dc

0.80

Ω

Drain to source on-state

3421

VGS = -10 V dc; condition A,

rDS(on)2

resistance

pulsed (see 4.5.1)

ID = -11 A dc

2N6804

0.36

2N6806

ID = -6.5 A dc

0.94

Forward voltage (source

4011

Pulsed (see 4.5.1), VGS = 0 V

VSD

drain diode)

For devices with a multiple

diode structure

IS = -11 A dc

2N6804

-4.7

IS = -6.5 A dc

2N6806

-6.0

See footnote at end of table.