INCH-POUND
The documentation and process conversion
measures necessary to comply with this revision
MIL-PRF-19500/563G
shall be completed by 9 February 2013.
9 November 2012
SUPERSEDING
5 November 2003
* PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, FIELD EFFECT TRANSISTOR, P-CHANNEL, SILICON,
TYPES 2N6845, 2N6845U, 2N6847, AND 2N6847U,
JAN, JANTX, JANTXV, JANS, JANHC, AND JANKC
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
*
The requirements for acquiring the product described herein shall consist of
1. SCOPE
1.1 Scope. This specification covers the performance requirements for a P-Channel, enhancement-mode,
MOSFET, power transistor. Four levels of product assurance are provided for each encapsulated device type as
specified in MIL-PRF-19500. Two levels of product assurance are provided for each unencapsulated device type.
1.2 Physical dimensions. See figure 1, TO-205AF (formerly TO-39), 2 (LCC), and figures 3 and 4 for JANHC and
JANKC die dimensions.
* 1.3 Maximum ratings. Unless otherwise specified, TA = +25�C.
RθJC
Type
PT (1)
PT
VDS
VDG
VGS
ID1 (3) (4)
ID2 (3)
IS
IDM
TJ and
TC = +25�C TC = +100�C
TC =
TA =
TSTG
(2)
(5)
+25�C
+25�C
�C/W
�C
W
W
V dc
V dc
V dc
A dc
A dc
A dc
A(pk)
�20
2N6845, U
20
0.8
-100
-100
-4.0
-2.6
-4.0
-16
6.25
-55 to +150
�20
2N6847, U
20
0.8
-200
-200
-2.5
-1.6
-2.5
-10
6.25
-55 to +150
Derate linearly 0.16 W/�C for TC > +25�C.
(1)
* (2)
(3)
The following formula derives the maximum theoretical ID limit. ID is limited by package and internal wires
and may be limited by pin diameter:
TJM - TC
ID =
( RθJC
) x ( R DS ( on ) at TJM
)
(4)
(5)
IDM = 4 x ID1 as calculated in note 2.
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since contact
information can change, you may want to verify the currency of this address information using the ASSIST
AMSC N/A
FSC 5961
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