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MIL-PRF-19500-599 Semiconductor Device, Transistors, Quad, Field Effect, P-Channel, Silicon, Type 2N7335, Jan, Jantx, Jantxv, Jans, Janhc, And JankcThis specification covers the performance requirements for quad P-channel, enhancement-mode, MOSFET, power transistor with avalanche energy ratings \(EAS and EAR\) and maximum avalanche current \(IAR\). Four levels of product assurance are provided for each encapsulated device type as specified in MIL?√PRF?√19500. Two levels of product assurance for each unencapsulated device type die \(element evaluation\) as specified in MIL?√PRF?√19500.

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MIL­PRF­19500/599E
TABLE I. Group A inspection.
Limit
Inspection 1/
Unit
Symbol
Max
Min
Method
Conditions
Subgroup 1
Visual and mechanical
2071
inspection
Subgroup 2
°C/W
Thermal impedance 2/
3161
10
ZθJC
Breakdown voltage,
3407
Bias condition C,
V(BR)DSS
­100
V dc
drain-to-source
VGS = 0V, ID = ­1 mA dc
VDS ≥ VGS,
Gate-to-source
3403
VGS(th)1
­2.0
­4.0
V dc
voltage (threshold)
ID = ­0.25 mA
Gate current (forward)
3411
Bias condition C, VGS = +20V dc,
IGSSF1
±100
nA dc
VDS = 0 V dc
Gate current (reverse)
3411
Bias condition C, VGS = ­20 V dc,
IGSSR1
±100
nA dc
VDS = 0 V dc
µA dc
Drain current
3413
Bias condition C, VGS = 0 V dc,
IDSS1
­25
VDS = 80 percent of rated VDS
Ω
Static drain to source
3421
Bias condition A, VGS = ­10 V dc,
rDS(on)1
1.4
on-state resistance
ID = rated ID2 (see 1.3),
pulsed (see 4.5.1)
Forward voltage
4011
VGS = 0 V dc, ID = rated ID1,
VSD
5.5
V
pulsed (see 4.5.1)
Subgroup 3
TC = TJ = +125°C
High temperature operation:
Gate current
3411
Bias condition C, VDS = 0 V dc,
IGSS2
±200
nA dc
VGS = +20V dc and ­20 V dc
Drain current
3413
Bias condition C, VGS = 0 V dc,
IDSS2
­0.25
mA dc
VDS = 80 percent of rated VDS
Ω
Static drain-to-source
3421
rDS(on)2
2.3
Bias condition A, VGS = ­10 V dc,
on-state resistance
ID = rated ID2, pulsed (see 4.5.1)
See footnote at end of table.
11



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