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MIL-PRF-19500-615 Semiconductor Device, Filed Effect Radiation Hardened Transistors, P-Channel, Silicon, Types 2N7382 And 2N7383, Jantxv M, D, R, And F And Jans M, D, R, And FThis specification covers the performance requirements for a P-channel, radiation hardened, enhancement mode, MOSFET, power transistor intended for use in high density power switching applications. Two levels of product assurance are provided for each device type as specified in MIL-PRF-19500, with avalanche energy ratings \(EAS\) and maximum avalanche current \(IAS\). See 6.5 for JANHC and JANKC die versions.

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MIL-PRF-19500/615G
TABLE III. Group E inspection (all quality levels) for qualification or re-qualification only.
Sampling
Inspection
plan
Method
Conditions
45 devices
Subgroup 1
c=0
Temperature cycling
1051
Test condition G; 500 cycles.
Hermetic seal
1071
Fine leak
Gross leak
Electrical measurements
See table I, subgroup 2.
Subgroup 2 1/
45 devices
c=0
Steady-state reverse bias
1042
Condition A, 1,000 hours.
Electrical measurements
See table I, subgroup 2.
Steady-state gate bias
1042
Condition B, 1,000 hours.
Electrical measurements
See table I, subgroup 2.
Subgroup 4
sample size
N/A
Thermal impedance curves
Subgroup 10
22 devices,
c=0
Commutating diode for safe
3476
Test conditions shall be derived by the
operating area test procedure for
manufacturer.
measuring dv/dt during reverse
recovery of power MOSFET
transistors or insulated gate bipolar
transistors
Subgroup 11
3 devices
SEE 2/ 3/
1080
See method 1080 of MIL-STD-750 and 6.2
herein.
1/
A separate sample for each test shall be pulled.
2/
Group E qualification of SEE effect testing may be performed prior to lot formation. Qualification may be
extended to other specification sheets utilizing the same structurally identical die design.
3/
Device qualification to a higher level LET is sufficient to qualify all lower level LETs.
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