MIL-PRF-19500/382J
4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500.
4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with MIL-PRF-19500 and table I
herein.
4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified for
subgroup testing in E-VIa (JANS) of 19500 and 4.4.2.1 herein. Electrical measurements (end-points) requirements
shall be in accordance with table I, subgroup 2 herein. Delta requirements shall be in accordance with 4.5.6 herein.
See 4.4.2.2 herein for JAN, JANTX, and JANTXV group B testing. Electrical measurements (end-points)
requirements shall be after each step in 4.4.2.2 and shall be in accordance with table I, subgroup 2 herein. Delta
requirements shall be in accordance with 4.5.6 herein.
4.4.2.1 Group B inspection (JANS), table E-VIa of MIL-PRF-19500.
Subgroup
Method
Condition
B3
2037
Condition A.
B4
1037
2,000 cycles. No heat sink or forced air cooling on the devices shall be
permitted. VCB = 10 V dc. ton = toff = 3 minutes, power = 400 mW.
B5
1027
failure occurs, resubmission shall be at the test conditions of the original sample).
Option 1: 96 hours minimum, sample size in accordance with table VIa of
MIL-PRF-19500, adjust TA or PD to achieve TJ = +275°C minimum.
Option 2: 216 hours, sample size = 45, c = 0; adjust TA or PD to achieve
TJ = +225°C minimum.
4.4.2.2 Group B inspection, (JAN, JANTX, and JANTXV), table E-VIb of MIL-PRF-19500. Separate samples may
be used for each step. In the event of a lot failure, the resubmission requirements of MIL-PRF-19500 shall apply. In
addition, all catastrophic failures during CI (conformance inspection) shall be analyzed to the extent possible to
identify root cause and corrective action. Whenever a failure is identified as wafer lot and/or wafer processing
related, the entire wafer lot and related devices assembled from the wafer lot shall be rejected unless an appropriate
determined corrective action to eliminate the failures mode has been implemented and the devices from the wafer lot
are screened to eliminate the failure mode. Electrical end-points shall be in accordance with table I subgroup 2,
herein.
Step
Method
Condition
Steady-state life: 1,000 hours, VCB = 10 V dc, power shall be applied and ambient
1
1026
temperature adjusted to achieve TJ = +150°C minimum, and a minimum of PD = 75
test time decreased as long as the devices are stressed for a total of 45,000 device hours
minimum, and the actual time of test is at least 340 hours.
Blocking life, TA = +150°C, VCB = 80 percent of rated voltage, 48 hours minimum.
2
1048
n = 45 devices, c = 0.
High- temperature life (non-operating), TA = +200°C, t = 340 hours, n = 22, c = 0.
3
1032
9
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