MIL-PRF-19500-382 Semiconductor Device, Transistor, Pnp, Silicon, Low-Power, Types 2N2944A, 2N2945A, 2N2945Am, And 2N2946A, 2N2944Aub, 2N2945Aub, 2N2945Aubm, And 2N2946Aub, Jan, Jantx, Jantxv, Jans, Janhc, Jankc, Jansm, Jansd, Jansp, Jansl, Jansr, Jansf, Jansg, Jansh, Janhcm, Janhcd, Janhcp, Janhcl, Janhcr, Janhcf, Janhcg, Janhch, Jankcm, Jankcd, Jankcp, Jankcl, Jankcr, Jankcf, Jankcg, A...This specification covers the performance requirements for low-power, high-speed chopper, PNP, silicon transistors. A ┬æM┬Æ and UB┬ÆM┬Æ suffix will indicate a matched pair. Four levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500. Two levels of product assurance are provided for each unencapsulated device type. Radiation hardness assurance \(RHA\) level designators "M", "D", "P", "L", "R", "F", "G", and "H" are appended to the device prefix to identify devices which have passed RHA requirements.

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MIL-PRF-19500/382J

* 4.4.4 Group D inspection. Conformance inspection for hardness assured JANS, and JANTXV types shall include

the group D tests specified in table II herein. These tests shall be performed as required in accordance with

MIL-PRF-19500 and method 1019 of MIL-STD-750, for total ionizing dose or method 1017 of MIL-STD-750 for

neutron fluence as applicable (see 6.2 herein), except group D, subgroup 2 may be performed separate from other

subgroups. Alternate package options may also be substituted for the testing provided there is no adverse effect to

the fluence profile.

4.4.5 Group E inspection. Group E inspection shall be conducted in accordance with the conditions specified for

subgroup testing in appendix E, table E-IX of MIL-PRF-19500 and as specified herein. Electrical measurements

(end-points) and delta requirements shall be in accordance with table I, subgroup 2 and 4.5.6 herein.

4.5 Methods of inspection. Methods of inspection shall be as specified in the appropriate tables and as follows.

4.5.1 Input capacitance. This test shall be conducted in accordance with method 3240 of MIL-STD-750, except

the output capacitor shall be omitted.

4.5.2 Emitter to collector breakdown voltage. Method of test shall be in accordance with method 3011 of

MIL-STD-750, test condition D, except that all references to the collector and the emitter of the transistor shall be

interchanged.

4.5.3 Forward-current transfer ratio (inverted connection). Method of test shall be in accordance with method

3076 of MIL-STD-750, except that all references to the collector and the emitter of the transistor shall be

interchanged in the test circuit. Then: hFE (inv) = IE / IB

4.5.4 Emitter to collector offset voltage. The transistor shall be tested in the circuit of figure 8. The base current

shall be adjusted to the specified value. The voltage between the emitter and collector shall then be measured using

a voltmeter with an input impedance high enough that halving it does not change the measured value within the

required accuracy of the measurement.

4.5.5 Small-signal emitter-collector on-state resistance. The transistor shall be tested in the circuit of figure 9.

The base current shall be adjusted to the specified value and an ac sinusoidal signal current, Ie, of the specified rms

value shall be applied between the emitter and collector. The rms voltage, Vec, between the emitter and collector

shall be measured using an ac voltmeter with an input impedance high enough that halving it does not change the

measured value within the required accuracy of the measurement. The small-signal emitter-collector on-state

resistance shall then be determined as follows:

rec (on) = Vec / Ie

Where Vec is the rms voltage between the emitter and collector.