INCH-POUND
The documentation and process conversion
measures necessary to comply with this revision
MIL-PRF-19500/399F
shall be completed by 12 September 2011.
29 July 2011
SUPERSEDING
MIL-PRF-19500/399E
25 March 2005
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON, SWITCHING
TYPE 2N3960 AND 2N3960UB
JAN, JANTX, JANTXV, JANTXVM, JANTXVD, JANTXVP, JANTXVL, JANTXVR, JANTXVF, JANTXVG, JANTXVH,
JANS, JANSM, JANSD, JANSP, JANSL, JANSR, JANSF, JANSG, JANSH, JANHC, JANHCM, JANHCD, JANHCP,
JANHCL, JANHCR, JANHCF, JANHCG, JANHCH, JANKC, JANKCM, JANKCD, JANKCP, JANKCL, JANKCR,
JANKCF, JANKCG, AND JANKCH
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for NPN silicon, switching transistors. Four
levels of product assurance are provided for each device type and two levels for unencapsulated die as specified in
MIL-PRF-19500. Two levels of product assurance are provided for each unencapsulated device type. RHA level
designators "M", "D", "P", "L", "R", "F", "G", and "H" are appended to the device prefix to identify devices which have
passed RHA requirements.
1.2 Physical dimensions. See figure 1 (TO-18), figure 2 (UB), and figure 3 (JANHC, JANKC).
1.3 Maximum ratings. Unless otherwise specified, TC = +25°C.
PT (1)
VCBO
VCEO
VEBO
TJ and TSTG
TA = +25°C
mW
V dc
V dc
V dc
°C
400
20
12
4.5
-65 to +200
(1) Derate linearly 2.3 mW/°C above TA = +25°C.
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dscc.dla.mil. Since
contact information can change, you may want to verify the currency of this address information using the
ASSIST Online database at https://assist.daps.dla.mil .
AMSC N/A
FSC 5961
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