MIL-PRF-19500-560 Semiconductor Device, Transistor, Npn, Silicon, Switching, Type 2N5339 And 2N5339U3, Jan, Jantx, Jantxv, Jans, Jansm, Jansd, Jansp, Jansl, Jansr, Jansf, Jansg, Jansh, Janhcc, Jankcc, Jankccm, Jankccd, Jankccp, Jankccl, Jankccr, Jankccf, Jankccg, And JankcchThis specification covers the performance requirements for NPN silicon switching transistors. Four levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500 and two levels of product assurance are provided for each unencapsulated device type as specified in MIL-PRF-19500. Provisions for radiation hardness assurance \(RHA\) to eight radiation levels is provided for JANS and JANKC product assurance levels. RHA level designators "M", "D", "P", "L", "R", "F", "G", and "H" are appended to the device prefix to identify devices, which have passed RHA requirements.

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MIL-PRF-19500/560L

4.3 Screening.

4.3.1 Screening of encapsulated devices (JANTX, JANTXV, and JANS levels only). Screening of packaged

devices shall be in accordance with table E-IV of MIL-PRF-19500, and as specified herein. The following

measurements shall be made in accordance with table I herein. Devices that exceed the limits of table I herein shall

not be acceptable.

Measurements

Screen (see

MIL-PRF-19500)

JANS level

JANTX and JANTXV levels

(1) 3c

Thermal impedance, method 3131 of

MIL-STD-750.

Not applicable

ICBO1 and hFE2

ICBO1; hFE2,

ĆICBO1 = �100 percent of initial value or 200

nA dc, whichever is greater;

ĆhFE2 = �15 percent

See 4.3.1.1

Subgroup 2 of table I herein;

Subgroups 2 and 3 of table I herein;

ĆICBO1 = �100 percent of initial value or 200 nA

ĆICBO1 = �100 percent of initial value or 200

nA dc, whichever is greater;

dc, whichever is greater;

ĆhFE2 = �15 percent.

For U3 packages: Method 1081 of

MIL-STD-750 (see 4.3.4), Endpoints:

Subgroup 2 of table I herein.

(1) Shall be performed anytime after temperature cycling, screen 3a; and does not need to be repeated in

screening requirements.

4.3.1.1 Power burn-in conditions. Power burn-in conditions are as follows: VCB = 10 - 30 V dc. TA = room

ambient as defined in the general requirements of 4.5 of MIL-STD-750. Power shall be applied to the device to

achieve TJ = minimum +175�C and minimum power dissipation of PD = 75 percent PT maximum as defined in 1.3.

With approval of the qualifying activity and preparing activity, alternate burn-in criteria (hours, bias conditions, TJ, and

mounting conditions.) may be used for JANTX and JANTXV quality levels. A justification demonstrating equivalence

is required. In addition, the manufacturing site's burn-in data and performance history will be essential criteria for

burn-in modification approval.

4.3.2 Screening for JANHC and JANKC. Screening for JANHC and JANKC die shall be in accordance with

MIL-PRF-19500, "Discrete Semiconductor Die/Chip Lot Acceptance". Burn-in duration for JANKC level follows JANS

requirements; the JANHC follows JANTX requirements.

4.3.3 Thermal impedance. The thermal impedance measurements shall be performed in accordance with

method 3131 of MIL-STD-750 using the guidelines in that method for determining IM, IH, tH, tMD (and VC where

appropriate). Measurement delay time (tMD) = 70 �s maximum. See table II, subgroup 4 and figures 8, 9, and 10

herein.