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MIL-PRF-19500-597 Semiconductor Device, Transistors, Quad, Field Effect, N-Channel, Silicon, Type 2N7334, Jan, Jantx, Jantxv, Jans, Janhc, And JankcThis specification covers the performance requirements for quad N-channel, enhancement-mode, MOSFET, power transistor with avalanche energy ratings \(EAS and EAR\) and maximum avalanche current \(IAR\). Four levels of product assurance are provided for each hermetic encapsulated device type as specified in MIL?√PRF?√19500. Two levels of product assurance are provided for each unencapsulated device type \(die\) as specified in MIL?√PRF?√19500.

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. . . . . . . .
INCH­POUND
The documentation and process conversion
measures necessary to comply with this revision
MIL­PRF­19500/597G
shall be completed by 15 August 2014.
17 May 2014
SUPERSEDING
MIL­PRF­19500/597F
27 January 2014
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, TRANSISTORS, QUAD, FIELD EFFECT,
N-CHANNEL, SILICON, TYPE 2N7334,
JAN, JANTX, JANTXV, JANS, JANHC, AND JANKC
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL­PRF­19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for quad N-channel, enhancement-mode,
MOSFET, power transistor with avalanche energy ratings (EAS and EAR) and maximum avalanche current (IAR). Four
levels of product assurance are provided for each hermetic encapsulated device type as specified in
MIL­PRF­19500. Two levels of product assurance are provided for each unencapsulated device type (die) as
specified in MIL­PRF­19500.
1.2 Physical dimensions. The device package styles are as follows: 14 pin dual-in line package (MO­036AB) in
accordance with figure 1 and unencapsulated die in accordance with figures 2 and 3 for device types JANHC and
JANKC.
1.3 Maximum ratings. Unless otherwise specified, TA = +25°C.
PT (1) TC = +25°C (free air)
ID2 (2)
IS
VGS
ID1 (2) (3)
EAS
EAR
TC = +25°C
TC = +100°C
(1 die)
(4 die)
W
W
V dc
A dc
A dc
A dc
mj
mj
1.4
2.5
±20
1.0
0.6
1.0
75
0.14
IDM
Top and TSTG
IAR
Maximum rDS(on) (1)
RθJA2
RθJC
RθJA1
maximum
maximum
maximum
VGS = 10 V dc, ID = ID2
(2)
(4)
TJ = +25°C
TJ = +150°C
(1 die)
(4 die)
(1 die)
°C
°C/W
°C/W
A
A(pk)
ohm
ohm
1.0
4.0
­55 to +150
0.70
1.4
90
50
Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since contact
information can change, you may want to verify the currency of this address information using the ASSIST
Online database at https://assist.dla.mil.
AMSC N/A
FSC 5961



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