MIL-PRF-19500-182 Semiconductor Device, Transistor, Npn, Silicon, Low-Power Types 2N720A, 2N720Aub, 2N1893, 2N1893S, Jans, Jan, Jantx, Jantxv, Janhc2N720A And Jankc2N720A, Jansm, Jansd, Jansp, Jansl, Jansr, Jansf, Jansg,Jansh, Janhcm, Janhcd, Janhcl, Janhcr, Jancf, Janhcg, Janhch, Jankcm, Jankcd, Jankcp, Jankcl, Jankcr, Jankcf, Jankcg, And JankchThis specification covers the performance requirements for NPN silicon, low-power transistors. Three levels of product assurance are provided for each device type as specified in MIL-PRF-19500, two levels of product assurance are provided for die.Radiation hardness assurance \(RHA\) level designators ┬ôM┬ö, ┬ôD┬ö, ┬ôP┬ô, ┬ôL┬ö ┬ôR┬ö, ┬ôF┬Æ, ┬ôG┬ö, and ┬ôH┬ö are appended to the device prefix to identify devices which have passed RHA requirements.

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MIL-PRF-19500/182H

4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as

specified herein.

* 4.2.1 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In

case qualification was awarded to a prior revision of the specification sheet that did not request the performance of

table III tests, the tests specified in table III herein that were not performed in the prior revision shall be performed on

the first inspection lot of this revision to maintain qualification.

4.2.2 JANHC and JANKC qualification. JANHC and JANKC qualification inspection shall be in accordance with

MIL-PRF-19500.

* 4.3 Screening (list applicable JANS, JANTX, and JANTXV levels). Screening shall be in accordance with table

E-IV of MIL-PRF-19500 and as specified herein. The following measurements shall be made in accordance with

table I herein. Devices that exceed the limits of table I herein shall not be acceptable.

Measurement

Screen (see table E-

of MIL-PRF-19500)

JANS

JANTX and JANTXV levels

(1) 3a

Thermal impedance (see 4.3.2).

Optional

ICBO2, hFE3

Not applicable

ICBO2, hFE3

ĆICBO2 = 100 percent of initial value or

5 nA dc, whichever is greater; ĆhFE3 = 15

percent of initial value.

See 4.3.1.

ĆICBO2 = 100 percent of initial value or

5 nA dc, whichever is greater; ĆhFE3 = 15

5 nA dc, whichever is greater; ĆhFE3 =

percent of initial value, subgroup 2 and 3

15 percent of initial value, subgroup 2

of table I herein.

Required

(1) Shall be performed anytime after temperature cycling, screen 3a; and does not need to be repeated in

screening requirements.

4.3.1 Power burn-in conditions. Power burn-in conditions are as follows: VCB = 10 - 30 V dc. Power shall be

applied to achieve TJ = +135�C minimum using a minimum PD = 75 percent of PT maximum rated as defined in 1.3.

With approval of the qualifying activity and preparing activity, alternate burn-in criteria (hours, bias conditions, TJ, and

mounting conditions) may be used for JANTX and JANTXV quality levels. A justification demonstrating equivalence

is required. In addition, the manufacturing site s burn-in data and performance history will be essential criteria for

burn-in modification approval.

4.3.2 Thermal impedance. The thermal impedance measurements shall be performed in accordance with

method 3131 of MIL-STD-750 using the guidelines in that method for determining IM, IH, tH, tSW (VC and VH where

appropriate). Measurement delay time (tMD) = 70 �s max. See group E, subgroup 4 herein.

4.3.3 Screening (JANHC and JANKC). Screening of JANHC and JANKC die shall be in accordance with

MIL-PRF-19500, "Discrete Semiconductor Die/Chip Lot Acceptance". As a minimum, die shall be 100-percent

probed to ensure compliance with group A, subgroup 2. Burn-in duration for the JANKC level follows JANS

requirements; the JANHC follows JANTX requirements.