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MIL-PRF-19500-182 Semiconductor Device, Transistor, Npn, Silicon, Low-Power Types 2N720A, 2N720Aub, 2N1893, 2N1893S, Jans, Jan, Jantx, Jantxv, Janhc2N720A And Jankc2N720A, Jansm, Jansd, Jansp, Jansl, Jansr, Jansf, Jansg,Jansh, Janhcm, Janhcd, Janhcl, Janhcr, Jancf, Janhcg, Janhch, Jankcm, Jankcd, Jankcp, Jankcl, Jankcr, Jankcf, Jankcg, And JankchThis specification covers the performance requirements for NPN silicon, low-power transistors. Three levels of product assurance are provided for each device type as specified in MIL-PRF-19500, two levels of product assurance are provided for die.Radiation hardness assurance \(RHA\) level designators “M”, “D”, “P“, “L” “R”, “F’, “G”, and “H” are appended to the device prefix to identify devices which have passed RHA requirements.

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. . . . . .
MIL-PRF-19500/182H
4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500 and as
specified herein.
4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with MIL-PRF-19500 and table I
herein.
4.4.2 Group B inspection. See 4.4.2.1 for JAN, JANTX, and JANTXV group B testing. Electrical measurements
(end-points) shall be in accordance with table I, subgroup 2 herein.
*
4.4.2.1 Group B inspection (JANS), table E-VIa of MIL-PRF-19500.
Subgroup Method
Condition
VCB = 10 V dc, adjust device current, or power, to achieve a minimum ĆTJ of +100°C.
B4
1037
B5
1027
VCB = 10 V dc; PD ≥ 100 percent of maximum rated PT (see 1.3). (NOTE: If a failure occurs,
resubmission shall be at the test conditions of the original sample.)
Option 1: 96 hours minimum sample size in accordance with MIL-PRF-19500, table E-VIa,
adjust TA or PD to achieve TJ = +275°C minimum.
Option 2: 216 hours minimum, sample size = 45, c = 0; adjust TA or PD to achieve a TJ =
+225°C minimum.
*  4.4.2.2 Group B inspection, (JAN, JANTX, and JANTXV). Separate samples may be used for each step. In the
event of a lot failure, the resubmission requirements of MIL-PRF-19500 shall apply. In addition, all catastrophic
failures during CI shall be analyzed to the extent possible to identify root cause and corrective action.
Step
Method
Condition
1
1026
Steady-state life: 1,000 hours minimum, VCB = 10 V dc, power shall be applied to achieve
TJ = +150°C minimum using a minimum of PD = 75 percent of maximum rated PT as defined
in 1.3. n = 45 devices, c = 0. The sample size may be increased and the test time
decreased as long as the devices are stressed for a total of 45,000 device hours minimum,
and the actual time of test is at least 340 hours.
2
1048
Blocking life, TA = 150°C, VCB = 80 percent of rated voltage, 48 hours minimum.
n = 45 devices, c = 0.
3
1032
High-temperature life (non-operating), t = 340 hours TA = +200°C. n = 22, c = 0.
4.4.2.3 Group B sample selection. Samples selected from group B inspection shall meet all of the following
requirements:
a. For JAN, JANTX, and JANTXV samples shall be selected randomly from a minimum of three wafers (or
from each wafer in the lot) from each wafer lot.
b. Shall be chosen from an inspection lot that has been submitted to and passed table I, subgroup 2,
conformance inspection. When the final lead finish is solder or any plating prone to oxidation at high
temperature, the samples for life test (group B for JAN, JANTX, and JANTXV) may be pulled prior to the
application of final lead finish.
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